Wait State - NEC V850ES/KE1+ User Manual

16.5.6 Wait state

The wait state is used to notify the communication partner that a device (master or slave) is preparing to transmit or
receive data (i.e., is in a wait state).
Setting the SCL0 pin to low level notifies the communication partner of the wait status. When wait status has been
canceled for both the master and slave devices, the next data transfer can begin.
(a) When master device has a nine-clock wait and slave device has an eight-clock wait
(master: transmission, slave: reception, and IICC0.ACKE0 bit = 1)
Master
IIC0
SCL0
Slave
IIC0
SCL0
ACKE0
Transfer lines
SCL0
SDA0
482
CHAPTER 16 I
Figure 16-10. Wait State (1/2)
Master returns to high
impedance but slave
is in wait state (low level).
6 7 8 9
Wait after output
of eighth clock.
H
Wait state
from slave
6 7 8
D2 D1 D0
User's Manual U16896EJ2V0UD
2
C BUS
Wait after output
of ninth clock.
IIC0 data write (cancel wait)
1
FFH is written to IIC0 register or
IICC0.WREL0 bit is set to 1.
Wait state
from master
9 1
ACK D7
2 3
2 3
D6 D5