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(2) FLMD1 pin
When 0 V is input to the FLMD0 pin, the FLMD1 pin does not function. When V
pin, the flash memory programming mode is entered, so 0 V must be input to the FLMD1 pin. The following
shows an example of the connection of the FLMD1 pin.
Caution If the V
signal is input to the FLMD1 pin from another device during on-board writing and
DD
immediately after reset, isolate this signal.
Table 26-8. Relationship Between FLMD0 and FLMD1 Pins and Operation Mode When Reset Is Released
FLMD0
0
V
DD
V
DD
642
CHAPTER 26 FLASH MEMORY
Figure 26-11. FLMD1 Pin Connection Example
V850ES/KE1+
FLMD1
Pull-down resistor (R
FLMD1
don't care
Normal operation mode
0
Flash memory programming mode
V
Setting prohibited
DD
User's Manual U16896EJ2V0UD
is supplied to the FLMD0
DD
Other device
)
FLMD1
Operation Mode
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