NEC V850ES/KE1+ User Manual page 435

32-bit single-chip microcontrollers
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CHAPTER 15 CLOCKED SERIAL INTERFACE 0 (CSI0)
Figure 15-1. Block Diagram of Clocked Serial Interface
6
f
/2
XX
5
f
/2
XX
4
f
/2
XX
3
f
/2
XX
2
f
/2
XX
f
/2
XX
TO5n
SCK0n
Transmission data control
SI0n
Remarks 1. n = 0, 1
2. f
: Main clock frequency
XX
Serial clock controller
Clock start/stop control
Selector
clock phase control
Transmission control
Initial transmit
SO selection
buffer register
(SOTBFn/SOTBFnL)
Transmit
buffer register
(SOTBn/SOTBnL)
Shift register
(SIO0n/SIO0nL)
Receive buffer register
(SIRBn/SIRBnL)
User's Manual U16896EJ2V0UD
SCK0n
&
Interrupt
INTCSI0n
controller
Control signal
SO0n
SO latch
435

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