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(8) TMP0 capture/compare register 1 (TP0CCR1)
The TP0CCR1 register can be used as a capture register or a compare register depending on the mode.
This register can be used as a capture register or a compare register only in the free-running timer mode,
depending on the setting of the TP0OPT0.TP0CCS1 bit. In the pulse width measurement mode, the TP0CCR1
register can be used only as a capture register. In any other mode, this register can be used only as a
compare register.
The TP0CCR1 register can be read or written during operation.
This register can be read or written in 16-bit units.
Reset sets this register to 0000H.
Caution Accessing the TP0CCR1 register is prohibited in the following statuses. For details, refer to
<R>
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
3.4.8 (1) (b) Access to special on-chip peripheral I/O register.
• When the CPU operates on the subclock and the main clock oscillation is stopped
• When the CPU operates on the internal oscillation clock
After reset: 0000H
R/W
13
15
14
TP0CCR1
Address: FFFFF5A8H
12
11
10
9
8
7
User's Manual U16896EJ2V0UD
6
5
4
3
2
1
0
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