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(2) Releasing internal oscillation HALT mode by reset
The same operation as the normal reset operation is performed.
Setting of Internal Oscillation
Item
CPU
ROM correction
Main clock oscillator
Subclock oscillator
Interrupt controller
16-bit timer (TMP0)
16-bit timer (TM01)
8-bit timers (TM50, TM51)
Timer H (TMH0)
Timer H (TMH1)
Watch timer
Watchdog timer 1
Watchdog timer 2
<R>
Serial interface
CSI00, CSI01
2
I
C0
UART0
UART1
Key interrupt function
A/D converter
Real-time output
Clock monitor
Power-on-clear
Low-voltage detector
Port function
Note Only in the
Remark
m = 0, 1
612
CHAPTER 21 CLOCK MONITOR
Table 21-5. Operation Status in Internal Oscillation HALT Mode
HALT Mode
When Subclock Is Not Used
Stops operation
Stops operation
Stops operation
Operable
Stops operation
Stops operation
Operable when TI5m is selected as count
clock
Stops operation
Operable when f
Stops operation
Stops operation
Stops operation
Operable when SCK0m input clock is selected as operation clock
Note
Stops operation
Operable when ASCK0 is selected as count clock
Stops operation
Operable
Stops operation
Operable when INTTM5m is selected as real-time output trigger and TM5m is enabled in
internal oscillation HALT mode
Stops operation
Operable
Operable
Retains status before internal oscillation HALT mode was set.
μ
PD703302Y, 70F3302Y
User's Manual U16896EJ2V0UD
Operation Status
−
Continues operation
Operable when INTWT is selected as
count clock and f
clock of WT
Operable when TI5m is selected as count
clock or when INTTM010 is selected as
count clock and TM01 is enabled in internal
oscillation HALT mode
/2048 is selected as count clock
R
Operable when f
clock
Operable
When Subclock Is Used
is selected as count
XT
is selected as count
XT
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