NEC V850ES/KE1+ User Manual page 263

(CR010 Register: Compare Register, CR011 Register: Compare Register)
FFFFH
TM01 register
0000H
Operable bits
(TMC013, TMC012)
Compare register
(CR010)
Compare match interrupt
(INTTM010)
Compare register
(CR011)
Compare match interrupt
(INTTM011)
TO01 pin output
Overflow flag
(OVF01)
This is an application example where two compare registers are used in the free-running timer mode.
The output level of the TO01 pin is reversed each time the count value of the TM01 register matches the set
values of the CR010 and CR011 registers. When the count value matches the register value, the INTTM010 or
INTTM011 signal is generated.
(2) Free-running timer mode operation
(CR010 register: compare register, CR011 register: capture register)
(CR010 Register: Compare Register, CR011 Register: Capture Register)
Count clock
Operable bits
TMC013, TMC012
Edge
TI010 pin
detection
CHAPTER 7 16-BIT TIMER/EVENT COUNTER 0
Figure 7-24. Timing Example of Free-Running Timer Mode
• TOC01 = 13H, PRM01 = 00H, CRC01 = 00H, TMC01 = 04H
M
N
00 01
M
N
0 write clear
Figure 7-25. Block Diagram of Free-Running Timer Mode
Capture register
Capture signal
User's Manual U16896EJ2V0UD
M M
N N
0 write clear
16-bit counter
(TM01)
Match signal
Compare register
(CR010)
(CR011)
M
N
0 write clear 0 write clear
Interrupt signal
(INTTM010)
Output
TO01 pin
controller
Interrupt signal
(INTTM011)
00
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