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CHAPTER 8 8-BIT TIMER/EVENT COUNTER 5
(1) 8-bit timer counter 5n (TM5n)
The TM5n register is an 8-bit read-only register that counts the count pulses.
The counter is incremented in synchronization with the rising edge of the count clock.
Through cascade connection, the TM5n registers can be used as a 16-bit timer.
When using the TM50 register and the TM51 register in cascade as a 16-bit timer, these registers can be read
only in 16-bit units. Therefore, read these registers twice and compare the values, taking into consideration
that the reading occurs during a count change.
After reset: 00H
R
Address: TM50 FFFFF5C0H, TM51 FFFFF5C1H
7
6
5
4
3
2
1
0
TM5n
(n = 0, 1)
The count value is reset to 00H in the following cases.
<1> Reset
<2> When the TMC5n.TCE5n bit is cleared (0)
<3> The TM5n register and CR5n register match in the mode in which clear & start occurs on a match
between the TM5n register and the CR5n register
Caution When connected in cascade, these registers become 0000H even when the TCE50 bit in the
lowest timer (TM50) is cleared.
Remark n = 0, 1
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User's Manual U16896EJ2V0UD
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