Power Fail Detection Function - NEC V850ES/KE1+ User Manual

13.5.4 Power fail detection function

The conversion end interrupt request signal (INTAD) can be controlled as follows using the PFM and PFT registers.
• If the PFM.PFEN bit = 0, the INTAD signal is generated each time conversion ends.
• If the PFEN bit = 1 and the PFM.PFCM bit = 0, the conversion result (ADCRH register) and the value of the PFT
register are compared when conversion ends, and the INTAD signal is generated only if ADCRH ≥ PFT.
• If the PFEN and PFCM bits = 1, the conversion result and the value of the PFT register are compared when
conversion ends, and the INTAD signal is generated only if ADCRH < PFT.
• Because, when the PFEN bit = 1, the conversion result is overwritten after the INTAD signal has been
generated, unless the conversion result is read by the time the next conversion ends, in some cases it may
appear as if the actual operation differs from the operation described above (refer to Figure 13-6).
Conversion operation
Note If reading is not performed during this interval, the conversion result changes to the next conversion result.
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CHAPTER 13 A/D CONVERTER
Figure 13-6. Power Fail Detection Function (PFCM Bit = 0)
ANI0
ADCRH
PFT
80H
INTAD
User's Manual U16896EJ2V0UD
ANI0 ANI0
80H 7FH
Note
ANI0
80H