Baud Rate Setting Example - NEC V850ES/KE1+ User Manual

14.6.3 Baud rate setting example

Baud Rate
(bps)
f
UCLK
300 f /512
XX
600 f /256
XX
1200 f /128
XX
2400 f /64
XX
4800 f /32
XX
9600 f /16
XX
10400 f /64
XX
19200 f /8
XX
24000 f /32
XX
31250 f /32
XX
33600 f /2
XX
38400 f /4
XX
48000 f /16
XX
56000 f /2
XX
62500 f /16
XX
76800 f /2
XX
115200 f /2
XX
153600 f /2
XX
312500 f /4
XX
Caution The allowable frequency of the base clock (f
• V
= 4.5 to 5.5 V: f
DD
• V
= 2.7 to 4.5 V: f
DD
Remark f : Main clock frequency
XX
f : Base clock frequency
UCLK
k: Set values of BRGCn.MDLn7 to BRGCn.MDLn0 bits
ERR: Baud rate error [%]
n = 0, 1
428
CHAPTER 14 ASYNCHRONOUS SERIAL INTERFACE (UART)
Table 14-4. Baud Rate Generator Setting Data
f = 20 MHz
XX
k ERR f
UCLK
41H (65) 0.16 f /1024
XX
41H (65) 0.16 f /1024
XX
41H (65) 0.16 f
XX
41H (65) 0.16 f
XX
41H (65) 0.16 f
XX
41H (65) 0.16 f
XX
0FH (15) 0.16 f
XX
41H (65) 0.16 f
XX
0DH (13) 0.16 f
XX
0AH (10) 0.00 f
XX
−0.13
95H (149) f
XX
41H (65) 0.16 f
XX
0DH (13) 0.16 f
XX
59H (89) 0.32 f
XX
0AH (10) 0.00 f
XX
41H (65) 0.16 f
XX
2BH (43) 0.94 f
XX
−1.36
21H (33) f
XX
08H (8) 0 f
XX
≤ 12 MHz
UCLK
≤ 6 MHz
UCLK
User's Manual U16896EJ2V0UD
f = 16 MHz
XX
k ERR
1AH (26) 0.16
0DH (13) 0.16
/512 0DH (13) 0.16
/256 0DH (13) 0.16
/128 0DH (13) 0.16
/64 0DH (13) 0.16
/64 0CH (12) 0.16
/32 0DH (13) 0.16
−0.20
/2 A7H (167)
/32 08H (8) 0.00
/2 77H (119) 0.04
/16 0DH (13) 0.16
/2 53H (83) 0.40
/2 47H (71) 0.60
/16 08H (8) 0.00
/8 0DH (13) 0.16
−0.79
/2 23H (35)
/4 0DH (13) 0.16
−1.54
/2 0DH (13)
) is as follows.
UCLK
f = 10 MHz
XX
f k ERR
UCLK
f /256 41H (65) 0.16
XX
f /128 41H (65) 0.16
XX
f /64 41H (65) 0.16
XX
f /32 41H (65) 0.16
XX
f /16 41H (65) 0.16
XX
f /8 41H (65) 0.16
XX
f /32 0FH (15) 0.16
XX
f /4 41H (65) 0.16
XX
f /16 0DH (13) 0.16
XX
f /16 0AH (10) 0
XX
−0.13
f 95H (149)
XX
f /2 41H (65) 0.16
XX
f /8 0DH (13) 0.16
XX
f 59H (89) 0.32
XX
f /8 0AH (10) 0.00
XX
f 41H (65) 0.16
XX
f 2BH (43) 0.94
XX
−1.36
f 21H (33)
XX
f /2 08H (8) 0.00
XX