NEC V850ES/KE1+ User Manual page 375

(4) Power fail comparison mode register (PFM)
This register sets the power fail detection mode.
The PFM register compares the value in the PFT register with the value of the ADCRH register.
The PFM register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
<R>
<R>
CHAPTER 13 A/D CONVERTER
After reset: 00H R/W Address: FFFFF202H
< > < >
PFM PFEN PFCM
PFEN
0 Power fail comparison disabled
1 Power fail comparison enabled
PFCM
Interrupt request signal (INTAD) generated when ADCR ≥ PFT
0
1
Interrupt request signal (INTAD) generated when ADCR < PFT
Cautions 1. Writing the PFM register is prohibited during A/D conversion operation
(ADM.ADCS bit = 1) in the normal mode (ADM.ADHS1, ADM.ADHS0 bits
= 00).
2. Accessing the PFM register is prohibited in the following statuses. For
details, refer to 3.4.8 (1) (b) Access to special on-chip peripheral I/O
register.
• When the CPU operates on the subclock and the main clock
oscillation is stopped
• When the CPU operates on the internal oscillation clock
0 0 0
Selection of power fail comparison enable/disable
Selection of power fail comparison mode
User's Manual U16896EJ2V0UD
0 0 0
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