NEC V850ES/KE1+ User Manual page 177

(b) 0%/100% output of PWM waveform
To output a 0% waveform, clear the TP0CCR1 register to 0000H. If the set value of the TP0CCR0 register
is FFFFH, the INTTP0CC1 signal is generated periodically.
Count clock
16-bit counter
TP0CE bit
TP0CCR0 register
TP0CCR1 register
INTTP0CC0 signal
INTTP0CC1 signal
TOP01 pin output
To output a 100% waveform, set a value of (set value of TP0CCR0 register + 1) to the TP0CCR1 register.
If the set value of the TP0CCR0 register is FFFFH, 100% output cannot be produced.
Count clock
16-bit counter
TP0CE bit
TP0CCR0 register
TP0CCR1 register
INTTP0CC0 signal
INTTP0CC1 signal
<R> TOP01 pin output
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
− 1
FFFF 0000 D
0
D
0
0000H
− 1
FFFF 0000 D
0
D
0
D + 1
0
User's Manual U16896EJ2V0UD
D 0000 0001
0
D
0
0000H
D 0000 0001
0
D
0
D + 1
0
− 1
D D 0000
0 0
D
0
0000H
− 1
D D 0000
0 0
D
0
D + 1
0
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