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(9) Capture operation
(a) If valid edge of TI010 pin is specified for count clock
If the valid edge of the TI010 pin is specified for the count clock, the capture register that specified the TI010
pin as the trigger does not operate normally.
(b) To ensure that signals input from TI011 and TI010 pins are correctly captured
To accurately capture the count value, the pulse input to the TI010 and TI011 pins as a capture trigger must
be wider than two count clocks selected by the PRM01 and SELCNT1 registers.
(c) Interrupt signal generation
Although a capture operation is performed at the falling edge of the count clock, an interrupt request signal
(INTTM010, INTTM011) is generated at the rising edge of the next count clock.
(d) Note when CRC01.CRC011 bit is set to 1
When the count value of the TM01 register is captured to the CR010 register in the phase reverse to the
signal input to the TI010 pin, the interrupt signal (INTTM010) is not generated after the count value is
captured. If the valid edge is detected on the TI011 pin during this operation, the capture operation is not
performed but the INTTM010 signal is generated as an external interrupt signal. Mask the INTTM010 signal
when the external interrupt is not used.
(10) Edge detection
(a) Specifying valid edge after reset
If the operation of the 16-bit timer/event counter 01 is enabled after reset and while the TI010 or TI011 pin is
at high level and when the rising edge or both the edges are specified as the valid edge of the TI010 or TI011
pin, then the high level of the TI010 or TI011 pin is detected as the rising edge. Note this when the TI010 or
TI011 pin is pulled up. However, the rising edge is not detected when the operation is once stopped and
then enabled again.
(b) Sampling clock for noise elimination
The sampling clock for noise elimination differs depending on whether the valid edge of TI010 is used for the
count clock or as a capture trigger. In the former case, sampling is performed using f
case, sampling is performed using the count clock selected by the PRM01 and SELCNT1 registers.
When the signal input to the TI010 pin is sampled and the valid level is detected two times in a row, the valid
edge is detected. Therefore, noise having a short pulse width can be eliminated.
Remark f
: Main clock frequency
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CHAPTER 7 16-BIT TIMER/EVENT COUNTER 0
User's Manual U16896EJ2V0UD
/4, and in the latter
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