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1.6 Function Block Configuration
(1) Internal block diagram
NMI
INTC
INTP0 to INTP7
16-bit
TI010, TI011
timer/event
counter 0: 1 ch
TO01
16-bit timer/
TIP00, TIP01
event counter
TOP00, TOP01
P: 1 ch
8-bit
TI50, TI51
timer/event
counter 5: 2 ch
TO50, TO51
8-bit timer H:
TOH0, TOH1
2 ch
SO00, SO01
CSI0: 2 ch
SI00, SI01
SCK00, SCK01
Note 2
SDA0
2
Note 2
I
C
1 ch
:
Note 2
SCL0
TXD0, TXD1
RXD0, RXD1
UART: 2 ch
ASCK0
Watchdog
timer: 2 ch
RTP00 to RTP05
RTO: 1 ch
μ
Notes 1.
PD703302, 703302Y:
μ
PD70F3302, 70F3302Y: 128 KB (flash memory)
μ
2. Only in the
PD703302Y, 70F3302Y
μ
3. Only in the
PD703302, 703302Y
μ
4. Only in the
PD70F3302, 70F3302Y
CHAPTER 1 INTRODUCTION
ROM
PC
Note 1
32-bit barrel
shifter
RAM
System
registers
4 KB
General-purpose
registers
32 bits × 32
ROM
correction
Port
Internal
oscillator
CLM
Key interrupt
KR0 to KR7
function
Watch timer
128 KB (mask ROM)
User's Manual U16896EJ2V0UD
CPU
Instruction
queue
Multiplier
16 × 16 → 32
BCU
ALU
A/D
converter
IC
EV
EV
FLMD0, FLMD1
V
SS
CLKOUT
X1
X2
CG
XT1
XT2
RESET
POC
LVI
V
DD
Note 3
DD
SS
Note 4
27
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