Configuration - NEC V850ES/KE1+ User Manual

32-bit single-chip microcontrollers
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14.2 Configuration

Item
Registers
Other
Remark
n = 0, 1
Figure 14-1 shows the configuration of UARTn.
(1) Asynchronous serial interface mode register n (ASIMn)
The ASIMn register is an 8-bit register for specifying the operation of UARTn.
(2) Asynchronous serial interface status register n (ASISn)
The ASISn register consists of a set of flags that indicate the error contents when a reception error occurs.
The various reception error flags are set (1) when a reception error occurs and are cleared (0) when the
ASISn register is read.
(3) Asynchronous serial interface transmit status register n (ASIFn)
The ASIFn register is an 8-bit register that indicates the status when a transmit operation is performed.
This register consists of a transmit buffer data flag, which indicates the hold status of the TXBn register data,
and the transmit shift register data flag, which indicates whether transmission is in progress.
(4) LIN operation control register 0 (ASICL0)
The ASICL0 register is an 8-bit register that controls the output format for SBF transmission/reception and
transmission.
The ASICL0 register can be used only with UART0.
(5) Reception control parity check
The receive operation is controlled according to the contents set in the ASIMn register. A check for parity
errors is also performed during a receive operation, and if an error is detected, a value corresponding to the
error contents is set in the ASISn register.
(6) Receive shift register
This is a shift register that converts the serial data that was input to the RXDn pin to parallel data. One byte
of data is received, and if a stop bit is detected, the receive data is transferred to the RXBn register.
This register cannot be directly manipulated.
396
CHAPTER 14 ASYNCHRONOUS SERIAL INTERFACE (UART)
Table 14-1. Configuration of UARTn
Receive buffer register n (RXBn)
Transmit buffer register n (TXBn)
Receive shift register
Transmit shift register
Asynchronous serial interface mode register n (ASIMn)
Asynchronous serial interface status register n (ASISn)
Asynchronous serial interface transmit status register n (ASIFn)
LIN operation control register 0 (ASICL0)
Reception control parity check
Addition of transmission control parity
User's Manual U16896EJ2V0UD
Configuration

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