NEC V850ES/KE1+ User Manual page 565

32-bit single-chip microcontrollers
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CHAPTER 17 INTERRUPT/EXCEPTION PROCESSING FUNCTION
(2) Restore
Execution is restored from debug trap processing by the DBRET instruction. When the DBRET instruction is
executed, the CPU performs the following processing and transfers control to the address of the restored PC.
<1> Loads the restored PC and PSW from DBPC and DBPSW.
<2> Transfers control to the loaded address of the restored PC and PSW.
Figure 17-13 shows the processing flow for restore from debug trap processing.
Figure 17-13. Processing Flow for Restore from Debug Trap
DBRET instruction
PC
DBPC
PSW
DBPSW
Jump to restored PC address
User's Manual U16896EJ2V0UD
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