NEC V850ES/KE1+ User Manual page 364

(1) PLL control register (PLLCTL)
The PLLCTL register is an 8-bit register that controls the RTO security function and PLL.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 01H.
After reset: 01H
PLLCTL
RTOST0
Note For details on the SELPLL and PLLON bits, refer to CHAPTER 5 CLOCK GENERATION
FUNCTION.
Cautions 1. Before outputting a value to the real-time output ports (RTP00 to RTP05),
364
CHAPTER 12 REAL-TIME OUTPUT FUNCTION (RTO)
R/W Address: FFFFF806H
0 0 0
Control of RTP00 to RTP05 security function
0 INTP0 pin is not used as trigger for security function
1
INTP0 pin is used as trigger for security function
select the INTP0 pin interrupt edge detection and then set the RTOST0 bit.
2. To set again the ports (P50 to P55 pins) as real-time output ports after
placing them in high impedance via the INTP0 pin, first cancel the security
function.
[Procedure to set ports again]
<1> Cancel the security function and enable port setting by clearing the
RTOST0 bit to 0.
<2> Set the RTOST0 bit to 1 (only if required).
<3> Set again as real-time output port.
3. Be sure to clear bits 4 to 7 to "0".
operation.
User's Manual U16896EJ2V0UD
< >
0 0 RTOST0 SELPLL
Changing bit 3 does not affect the
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Note Note
PLLON