External Wait Function; Relationship Between Programmable Wait And External Wait - NEC V850E/MA1 User Manual

4.6.2 External wait function

When an extremely slow device, I/O, or asynchronous system is connected, an arbitrary number of wait states can
be inserted in the bus cycle by the external wait pin (WAIT) for synchronization with the external device.
Just as with programmable waits, accessing internal ROM, internal RAM, and on-chip peripheral I/O areas cannot
be controlled by external waits.
The external WAIT signal can be input asynchronously to CLKOUT and is sampled at the falling edge of the clock
in the T1 and TW states of a bus cycle. If the setup/hold time in the sampling timing is not satisfied, the wait state
may or may not be inserted in the next state.

4.6.3 Relationship between programmable wait and external wait

A wait cycle is inserted as the result of an OR operation between the wait cycle specified by the set value of the
programmable wait and the wait cycle controlled by the WAIT pin. In other words, the number of wait cycles is
determined by the side with the greatest number of cycles.
For example, if the timings of the programmable wait and the WAIT pin signal are as illustrated below, three wait
states will be inserted in the bus cycle.
CLKOUT
WAIT pin
Wait by WAIT pin
Programmable wait
Wait control
Remark The circle
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CHAPTER 4 BUS CONTROL FUNCTION
Programmable wait
Wait by WAIT pin
Figure 4-5. Example of Wait Insertion
T1
indicates the sampling timing
User's Manual U14359EJ4V0UM
Wait control
TW
TW TW T2