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Figure 7-18. Timing Example of Clear & Start Mode Entered by TI010 Pin Valid Edge Input
(CR010 Register: Capture Register, CR011 Register: Compare Register) (1/2)
(a) TOC01 = 13H, PRM01 = 10H, CRC01 = 03H, TMC01 = 08H, CR011 = 0000H
TM01 register
0000H
Operable bits
(TMC013, TMC012)
Capture & count clear input
(TI010 pin input)
Capture register
(CR010)
Capture interrupt
(INTTM010)
Compare register
(CR011)
Compare match interrupt
(INTTM011)
TO01 pin output
This is an application example where the output level of the TO01 pin is to be inverted when the count value
has been captured & cleared.
The TM01 register is cleared at the rising edge detection of the TI010 pin and it is captured to the CR010
register at the falling edge detection of the TI010 pin.
When the CRC01.CRC011 bit is set to 1, the count value of the TM01 register is captured to CR010 in the
phase reverse to that of the signal input to the TI010 pin, but the capture interrupt signal (INTTM010) is not
generated. However, the INTTM010 signal is generated when the valid edge of the TI011 pin is detected.
Mask the INTTM010 signal when it is not used.
254
CHAPTER 7 16-BIT TIMER/EVENT COUNTER 0
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0000H
User's Manual U16896EJ2V0UD
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