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(3) Oscillation stabilization time selection register (OSTS)
The wait time until the oscillation stabilizes after the STOP mode is released is controlled by the OSTS register.
The OSTS register can be read or written in 8-bit units.
Reset sets this register to 01H.
After reset: Note
OSTS
0
OSTS2
0
0
0
0
1
1
1
1
Note This register is set to 00H or 01H, depending on the setting of the mask option/option byte.
For details, refer to CHAPTER 25 MASK OPTION/OPTION BYTE.
Cautions 1. The wait time following release of the STOP mode does not include the time until the clock
oscillation starts ("a" in the figure below) following release of the STOP mode, regardless
of whether the STOP mode is released by reset or the occurrence of an interrupt request
signal.
2. Be sure to clear bits 3 to 7 to "0".
3. The oscillation stabilization time is also inserted during external clock input.
Remark f
: Main clock oscillation frequency
X
CHAPTER 19 STANDBY FUNCTION
R/W
Address: FFFFF6C0H
0
0
0
OSTS1
OSTS0
Selection of oscillation stabilization time
13
0
0
2
/f
X
0
1
15
2
/f
X
16
1
0
2
/f
X
17
1
1
2
/f
X
18
0
0
2
/f
X
0
1
19
2
/f
X
20
1
0
2
/f
X
21
1
1
2
/f
X
STOP mode release
Voltage waveform of X1 pin
V
SS
User's Manual U16896EJ2V0UD
0
OSTS2
OSTS1
f
X
4 MHz
5 MHz
10 MHz
2.048 ms
1.638 ms
0.819 ms
8.192 ms
6.554 ms
3.277 ms
16.38 ms
13.11 ms
6.554 ms
26.21 ms
32.77 ms
13.11 ms
65.54 ms
52.43 ms
26.21 ms
131.1 ms
104.9 ms
52.43 ms
262.1 ms
209.7 ms
104.9 ms
419.4 ms
524.3 ms
209.7 ms
a
OSTS0
577
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