NEC V850ES/KE1+ User Manual page 264

(CR010 Register: Compare Register, CR011 Register: Capture Register)
FFFFH
TM01 register
0000H
Operable bits
(TMC013, TMC012)
Capture trigger input
(TI010)
Compare register
(CR010)
Compare match interrupt
(INTTM010)
Compare register
(CR011)
Capture interrupt
(INTTM011)
TO01 pin output
Overflow flag
(OVF01)
This is an application example where a compare register and a capture register are used at the same time in
the free-running timer mode.
In this example, the INTTM010 signal is generated and the output level of the TO01 pin is reversed each time
the count value of the TM01 register matches the set value of the CR010 register (compare register). In
addition, the INTTM011 signal is generated and the count value of the TM01 register is captured to the CR011
register each time the valid edge of the TI010 pin is detected.
264
CHAPTER 7 16-BIT TIMER/EVENT COUNTER 0
Figure 7-26. Timing Example of Free-Running Timer Mode
• TOC01 = 13H, PRM01 = 10H, CRC01 = 04H, TMC01 = 04H
M
00 01
0000H
0000H
M
0 write clear
User's Manual U16896EJ2V0UD
N
S
N
0 write clear
P
Q
S Q
P
0 write clear 0 write clear