NEC V850ES/KE1+ User Manual page 191

(d) TMP0 I/O control register 2 (TP0IOC2)
TP0IOC2
0 0
(e) TMP0 counter read buffer register (TP0CNT)
The value of the 16-bit counter can be read by reading the TP0CNT register.
(f) TMP0 capture/compare registers 0 and 1 (TP0CCR0 and TP0CCR1)
If D is set to the TP0CCR0 register and D
0
the PWM waveform are as follows.
+ 1) × Count clock cycle
Cycle = (D
0
Active level width = D
Remark TMP0 I/O control register 1 (TP0IOC1) and TMP0 option register 0 (TP0OPT0) are not used
in the PWM output mode.
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
Figure 6-26. Register Setting in PWM Output Mode (2/2)
TP0EES1
0 0 0/1
1
× Count clock cycle
1
User's Manual U16896EJ2V0UD
TP0EES0 TP0ETS1 TP0ETS0
0/1 0
to the TP0CCR1 register, the cycle and active level width of
0
Select valid edge
of external event
count input.
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