Operation Modes - NEC V850ES/KE1+ User Manual

13.5.3 Operation modes

The following two operation modes are available. These operation modes are set by the ADM register.
• Select mode
• Scan mode
(1) Select mode
One input analog signal specified by the ADS register while the ADM.ADMD bit = 0 is converted. When
conversion is complete, the result of conversion is stored in the ADCR register.
At the same time, the A/D conversion end interrupt request signal (INTAD) is generated. However, the INTAD
signal may or may not be generated depending on setting of the PFM and PFT registers. For details, refer to
13.5.4 Power fail detection function.
If anything is written to the ADM, ADS, PFM, and PFT registers during conversion in the high-speed mode
(ADM.ADHS1, ADM.ADHS0 bits = 01 or 10), A/D conversion is aborted. In the software trigger mode, A/D
conversion is started from the beginning again. In the hardware trigger mode, the A/D converter waits for a
trigger. Writing the ADM, ADS, PFM, and PFT registers is prohibited during conversion operation in the
<R>
normal mode (ADHS1, ADHS0 bits = 00).
If the trigger is detected during conversion in the hardware trigger mode in the high-speed mode (ADHS1,
ADHS0 bits = 01 or 10), A/D conversion is aborted and started again from the beginning. Inputting trigger
<R>
again is prohibited during A/D conversion operation in the normal mode (ADHS1, ADHS0 bits = 00).
Figure 13-4. Example of Select Mode Operation Timing (ADS.ADS2 to ADS.ADS0 Bits = 0001B)
A/D conversion
ADCR
INTAD
ANI1
Data 1
Data 1
(ANI1)
Conversion end
Conversion start
Set ADCS bit = 1
CHAPTER 13 A/D CONVERTER
Data 1
(ANI1)
User's Manual U16896EJ2V0UD
Data 2
Data 2
(ANI1)
Data 2
(ANI1)
Conversion end
Conversion start
Set ADCS bit = 1
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