Special Registers - NEC V850ES/KE1+ User Manual

3.4.7 Special registers

Special registers are registers that prevent invalid data from being written when an inadvertent program loop
occurs.
The V850ES/KE1+ has the following six special registers.
• Power save control register (PSC)
• Processor clock control register (PCC)
• Watchdog timer mode register (WDTM1)
• Clock monitor mode register (CLM)
• Reset source flag register (RESF)
• Low-voltage detection register (LVIM)
Moreover, there is also the PRCMD register, which is a protection register for write operations to the special
registers that prevents the application system from unexpectedly stopping due to an inadvertent program loop. Write
access to the special registers is performed with a special sequence and illegal store operations are notified to the
SYS register.
(1) Setting data to special registers
Setting data to a special register is done in the following sequence.
<1> Prepare the data to be set to the special register in a general-purpose register.
<2> Write the data prepared in step <1> to the PRCMD register.
<3> Write the setting data to the special register (using following instructions).
• Store instruction (ST/SST instruction)
• Bit manipulation instruction (SET1/CLR1/NOT1 instruction)
<4> to <8> Insert NOP instructions (5 instructions)
Note When switching to the IDLE mode or the STOP mode (PSC.STP bit = 1), 5 NOP instructions must be
inserted immediately after switching is performed.
CHAPTER 3 CPU FUNCTIONS
Note
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