NEC V850ES/KE1+ User Manual page 401

CHAPTER 14 ASYNCHRONOUS SERIAL INTERFACE (UART)
(3) Asynchronous serial interface transmit status register n (ASIFn)
The ASIFn register, which consists of 2 status flag bits, indicates the status during transmission.
By writing the next data to the TXBn register after data is transferred from the TXBn register to the transmit
shift register, transmit operations can be performed continuously without suspension even during an interrupt
interval. When transmission is performed continuously, data should be written after referencing the TXBFn
bit to prevent writing to the TXBn register by mistake.
This register is read-only in 8-bit or 1-bit units.
Reset sets this register to 00H.
After reset: 00H
7
ASIFn 0
(n = 0, 1)
TXBFn
0
Data to be transferred next to TXBn register does not exist (When the ASIMn.UARTEn or ASIMn.TXEn bit
is cleared to 0, or when data has been transferred to the transmission shift register)
1
Data to be transferred next exists in TXBn register (Data exists in TXBn register when the TXBn register
has been written to)
• When transmission is performed continuously, data should be written to the TXBn register after confirming that this
flag is 0. If writing to TXBn register is performed when this flag is 1, transmit data cannot be guaranteed.
TXSFn Transmit shift register data flag (indicates the transmission status of UARTn)
Initial status or a waiting transmission (When the UARTEn or TXEn bit is cleared to 0, or when following
0
transmission completion, the next data transfer from the TXBn register is not performed)
1 Transmission in progress (When data has been transferred from the TXBn register)
• When the transmission unit is initialized, initialization should be executed after confirming that this flag is 0
following the occurrence of a transmission completion interrupt request signal (INTSTn).
performed when this flag is 1, transmit data cannot be guaranteed.
R Address: ASIF0 FFFFFA05H, ASIF1 FFFFFA15H
6 5 4
0 0 0
Transmission buffer data flag
User's Manual U16896EJ2V0UD
3 2 <1>
0 0 TXBFn TXSFn
<0>
If initialization is
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