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(5) Selector operation control register 1 (SELCNT1)
The SELCNT1 register sets the count clock of 16-bit timer/event counter 01.
The SELCNT1 register is set in combination with the PRM01.PRM101 and PRM01.PRM100 bits. Refer to 7.3 (6)
Count clock setting for 16-bit timer/event counter 01 for details.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
After reset: 00H
SELCNT1
(6) Count clock setting for 16-bit timer/event counter 01
The count clock for 16-bit timer/event counter 01 is set by using the PRM01.PRM011, PRM01.PRM010, and
SELCNT1.ISEL11 bits in combination.
SELCNT1 Register
PRM01 Register
ISEL11 Bit
PRM011 Bit
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
Notes 1.
When the internal clock is selected, set so as to satisfy the following conditions:
= 4.0 to 5.5 V: Count clock ≤ 10 MHz
V
DD
= 2.7 to 4.0 V: Count clock ≤ 5 MHz
V
DD
2.
The external clock requires a pulse longer than two cycles of the internal clock (f
CHAPTER 7 16-BIT TIMER/EVENT COUNTER 0
R/W
Address: FFFFF30AH
7
6
5
0
0
0
PRM010 Bit
Count Clock
0
f
XX
1
f
/4
XX
0
INTWT
1
Valid edge of TI0101
0
f
/2
XX
1
f
/8
XX
0
f
/16
XX
1
User's Manual U16896EJ2V0UD
4
3
2
0
0
0
ISEL11
Selection of Count Clock
f
= 20 MHz
XX
Setting prohibited Setting prohibited
200 ns
−
−
Note 2
100 ns
400 ns
800 ns
Setting prohibited
1
0
0
Note 1
f
= 16 MHz
f
= 10 MHz
XX
XX
100 ns
250 ns
400 ns
−
−
−
−
125 ns
200 ns
500 ns
800 ns
μ
μ
1.0
s
1.6
s
/4).
XX
237
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