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Chapter 4 Bus Control Function
4.6.2 External wait function
When an extremely slow device, I/O, or asynchronous system is connected, any number of wait states
can be inserted in a bus cycle by the external wait pin (WAIT) to synchronize with the external device.
Just as with programmable waits, access to internal ROM, internal RAM, and internal peripheral I/O
areas cannot be controlled by external waits.
Input of the external WAIT signal can be done asynchronously to CLKOUT and is sampled at the rising
edge of the clock in the T1 and TW states of a bus cycle. If the setup/hold time at sampling timing is not
satisfied, the wait state may or may not be inserted in the next state.
4.6.3 Relationship between programmable wait and external wait
A wait cycle is inserted as the result of an OR operation between the wait cycle specified by the set
value of the programmable wait and the wait cycle controlled by the WAIT pin. In other words, the
number of wait cycles is determined by the side with the greatest number of cycles.
Programmable wait
Wait control
Wait by WAIT pin
For example, if the programmable wait and the timing of the WAIT pin signal are as illustrated below,
three wait states will be inserted in the bus cycle.
Figure 4-5: Example of Wait Insertion
TW
T1
TW
TW
T2
CLKOUT
WAIT pin
Wait by WAIT pin
Programmable wait
Wait control
Remark: The circle
indicates the sampling timing.
Preliminary User's Manual U14913EE1V0UM00
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