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(9) TMP0 counter read buffer register (TP0CNT)
The TP0CNT register is a read buffer register that can read the count value of the 16-bit counter.
If this register is read when the TP0CTL0.TP0CE bit = 1, the count value of the 16-bit counter can be read.
This register is read-only, in 16-bit units.
The value of the TP0CNT register is cleared to 0000H when the TP0CE bit = 0. If the TP0CNT register is read
at this time, the value of the 16-bit counter (FFFFH) is not read, but 0000H is read.
Reset sets the TP0CE bit to 0. Therefore, the TP0CNT register is set to 0000H.
Caution Accessing the TP0CNT register is prohibited in the following statuses. For details, refer to
<R>
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
3.4.8 (1) (b) Access to special on-chip peripheral I/O register.
• When the CPU operates on the subclock and the main clock oscillation is stopped
• When the CPU operates on the internal oscillation clock
After reset: 0000H
R
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TP0CNT
Address: FFFFF5AAH
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User's Manual U16896EJ2V0UD
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