Cautions - NEC V850ES/KE1+ User Manual

6.7 Cautions

(1) Capture operation
When the capture operation is used and f
(TP0CTL1.TP0EEE bit = 1) is selected as the count clock, FFFFH, not 0000H, may be captured in the
TP0CCRn register if the capture trigger is input immediately after the TP0CE bit is set to 1.
(a) Free-running timer mode
FFFFH
16-bit counter
0000H
Count clock
Sampling clock (f )
XX
TP0CCR0 register
TP0CE bit
TIP00 pin input
(b) Pulse width measurement mode
FFFFH
16-bit counter
0000H
Count clock
Sampling clock (f )
XX
TP0CCR0 register
0000H
TP0CE bit
TIP00 pin input
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
/8, f
XX
0000H FFFFH
Capture
trigger input
FFFFH
Capture
trigger input
User's Manual U16896EJ2V0UD
/16, f /32, f /64, f /128, or the external event counter
XX XX XX XX
0001H
Capture
trigger input
0002H
Capture
trigger input
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