Ppg Output Operation - NEC V850ES/KE1+ User Manual

7.4.6 PPG output operation

A rectangular wave having a pulse width set in advance by the CR011 register is output from the TO01 pin as a
PPG (Programmable Pulse Generator) signal during a cycle set by the CR010 register when the TMC01.TMC013 and
TMC01.TMC012 bits are set to 11 (clear & start upon a match between the TM01 register and the CR010 register).
The pulse cycle and duty factor of the pulse generated as the PPG output are as follows.
• Pulse cycle = (Set value of the CR010 register + 1) × Count clock cycle
• Duty = (Set value of the CR011 register + 1) / (Set value of the CR010 register + 1)
Caution To change the duty factor (value of the CR011 register) during operation, refer to 7.5.1 Rewriting
CR011 register during TM01 operation.
Remarks 1. For the alternate-function pin settings, refer to Table 4-12 Settings When Port Pins Are Used for
Alternate Functions.
2. For enabling the INTTM010 and INTTM011 interrupts, refer to CHAPTER 17
EXCEPTION PROCESSING FUNCTION.
Count clock
Operable bits
TMC013, TMC012
CHAPTER 7 16-BIT TIMER/EVENT COUNTER 0
Figure 7-31. Block Diagram of PPG Output Operation
Clear
16-bit counter
(TM01)
Compare register
Match signal
Compare register
(CR011)
User's Manual U16896EJ2V0UD
Match signal
Output
(CR010)
controller
INTERRUPT/
Interrupt signal
(INTTM010)
TO01 pin
Interrupt signal
(INTTM011)
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