NEC V850ES/KE1+ User Manual page 465

After reset: 00H R/W
<7> <6>
IICC0 IICE0 LREL0
IICE0
0 Stop operation. Reset the IICS0 register
1 Enable operation.
Be sure to set this bit to 1 when the SCL0 and SDA0 lines are high level.
Condition for clearing (IICE0 bit = 0)
• Cleared by instruction
• Reset
Note 2
LREL0
0 Normal operation
1 This exits from the current communications and sets standby mode. This setting is automatically cleared to 0
after being executed.
Its uses include cases in which a locally irrelevant extension code has been received.
The SCL0 and SDA0 lines are set to high impedance.
The STT0, SPT0, IICS0.MSTS0, IICS0.EXC0, IICS0.COI0, IICS0.TRC0, IICS0.ACKD0, and IICS0.STD0 bits
are cleared to 0.
The standby mode following exit from communications remains in effect until the following communications entry conditions
are met.
• After a stop condition is detected, restart is in master mode.
• An address match or extension code reception occurs after the start condition.
Condition for clearing (LREL0 bit = 0)
• Automatically cleared after execution
• Reset
Note 2
WREL0
0 Do not cancel wait
1 Cancel wait. This setting is automatically cleared to 0 after wait is canceled.
Condition for clearing (WREL0 bit = 0)
• Automatically cleared after execution
• Reset
Notes 1. The IICS0 register, and the IICF0.STCF0, IICF0.IICBSY0, IICCL0.CLD0, and IICCL0.DAD0 bits are
reset.
2. This flag's signal is invalid when the IICE0 bit = 0.
2
Caution If the I C0 operation is enabled (IICE0 bit = 1) when the SCL0 line is high level and the SDA0
line is low level, the start condition is detected immediately. To avoid this, after enabling the
2
I C0 operation, immediately set the LREL0 bit to 1 with a bit manipulation instruction.
CHAPTER 16 I
Address: FFFFFD82H
<5> <4> <3>
WREL0 SPIE0 WTIM0
2
I C0 operation enable/disable specification
Note 1
. Stop internal operation.
Exit from communications
Wait cancellation control
User's Manual U16896EJ2V0UD
2
C BUS
<2> <1>
ACKE0 STT0
Condition for setting (IICE0 bit = 1)
• Set by instruction
Condition for setting (LREL0 bit = 1)
• Set by instruction
Condition for setting (WREL0 bit = 1)
• Set by instruction
(1/4)
<0>
SPT0
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