NEC V850ES/KE1+ User Manual page 449

32-bit single-chip microcontrollers
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Figure 15-3. Timing Chart in Single Transfer Mode (2/2)
(b) In transmission/reception mode, data length: 8 bits, transfer direction: MSB first, no interrupt delay,
single transfer mode, when AAH is received and 55H is transmitted, transmit/receive type 2
SCK0n (I/O)
SO0n (output)
SI0n (input)
Reg_R/W
SOTBnL
register
SIO0nL
register
SIRBnL
register
CSOTn bit
INTCSI0n
signal
Remarks 1. Reg_R/W: Internal signal. This signal indicates that the SIRBn/SIRBnL register read or the
2. For the transmit/receive types, refer to 15.3 (2)
register n (CSICn).
3. n = 0, 1
CHAPTER 15 CLOCKED SERIAL INTERFACE 0 (CSI0)
0
1
0
1
0
1
Write 55H to SOTBnL register
ABH
56H
SOTBn/SOTBnL register write was performed.
User's Manual U16896EJ2V0UD
1
0
1
0
1
0
55H (transmit data)
ADH
5AH
B5H
Clocked serial interface clock selection
0
1
(55H)
1
0
(AAH)
6AH
D5H
AAH
AAH
449

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