NEC V850ES/KE1+ User Manual page 530

32-bit single-chip microcontrollers
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(When 8-Clock Wait for Master and 9-Clock Wait for Slave Are Selected) (3/3)
Processing by master device
IIC0
ACKD0
STD0
SPD0
WTIM0
ACKE0
MSTS0
STT0
SPT0
WREL0
INTIIC0
TRC0
Transfer lines
SCL0
SDA0
Processing by slave device
IIC0
ACKD0
STD0
SPD0
WTIM0
H
H
ACKE0
MSTS0
L
STT0
L
SPT0
L
WREL0
INTIIC0
TRC0
Note To cancel master wait, write FFH to IIC0 or set WREL0.
530
CHAPTER 16 I
Figure 16-21. Example of Slave to Master Communication
(c) Stop condition
IIC0
FFH Note
Note
1
2
3
4
5
D7
D6
D5
D4
D3
IIC0
data
User's Manual U16896EJ2V0UD
2
C BUS
6
7
8
9
D2
D1
D0
NACK
IIC0
address
(when SPIE0 = 1)
1
AD6
Stop
Start
condition
condition
(when SPIE0 = 1)

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