Master Device Operation - NEC V850ES/KE1+ User Manual

32-bit single-chip microcontrollers
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16.6.1 Master device operation

(1) Start ~ Address ~ Data ~ Data ~ Stop (normal transmission/reception)
<1> When IICC0.WTIM0 bit = 0
ST
AD6 to AD0
1: IICS0 register = 1000X110B
2: IICS0 register = 1000X000B
3: IICS0 register = 1000X000B (WTIM0 bit = 1
4: IICS0 register = 1000XX00B
Δ 5: IICS0 register = 00000001B
Note To generate a stop condition, set the WTIM0 bit to 1 and change the timing of the generation
of the interrupt request signal (INTIIC0).
Remark
: Always generated
Δ:
X: don't care
<2> When WTIM0 bit = 1
ST
AD6 to AD0
1: IICS0 register = 1000X110B
2: IICS0 register = 1000X100B
3: IICS0 register = 1000XX00B
Δ 4: IICS0 register = 00000001B
Remark
: Always generated
Δ: Generated only when SPIE0 bit = 1
X: don't care
486
CHAPTER 16 I
R/W
ACK
D7 to D0
1
2
Note
Generated only when IICC0.SPIE0 bit = 1
R/W
ACK
D7 to D0
1
User's Manual U16896EJ2V0UD
2
C BUS
IICC0.SPT0 bit = 1
ACK
D7 to D0
ACK
SP
3
4
)
SPT0 bit = 1
ACK
D7 to D0
ACK
SP
2
3
Δ5
Δ4

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