9.7.4
Contention between TCOR Read and Input Capture
If an input capture signal occurs in the T
state of a TCOR read cycle, the value before input
3
capture is read. Figure 9.21 shows the timing in this case.
TCORB read cycle
T
T
T
1
2
3
φ
Address bus
TCORB address
Internal read signal
Input capture signal
TCORB
N
M
Internal data bus
N
Figure 9.21 Contention between TCOR Read and Input Capture
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