16.1
Overview
The H8/3062 Series has high-speed static RAM on-chip. The RAM is connected to the CPU by a
16-bit data bus. The CPU accesses both byte data and word data in two states, making the RAM
useful for rapid data transfer.
The on-chip RAM can be enabled or disabled with the RAM enable bit (RAME) in the system
control register (SYSCR). When the on-chip RAM is disabled, that area is assigned to external
space in the expanded modes. The on-chip RAM specifications for the product lineup are shown in
table 16.1.
Table 16.1 H8/3062 Series On-Chip RAM Specifications
H8/3062
F-ZTAT
RAM size
Address
Modes
assign-
1, 2, 7
ment
Modes
3, 4, 5
Mode
6
Section 16 RAM
H8/3062 Mask
H8/3062
H8/3062
ROM Version,
F-ZTAT
F-ZTAT
H8/3062 Mask
R-Mask
B-Mask
ROM B-Mask
Version
Version
Version
4 kbytes
H'FEF20 to H'FFF1F
H'FEF20 to H'FFF1F
H'FEF20 to H'FFF1F
H8/3061 Mask
H8/3060 Mask
ROM Version,
ROM Version,
H8/3061 Mask
H8/3060 Mask
ROM B-Mask
ROM B-Mask
Version
Version
2 kbytes
H'FF720
to
H'FFF1F
H'FFF720
to
H'FFFF1F
H'F720
to
H'FF1F
H8/3064
H8/3064
F-ZTAT
Mask ROM
B-Mask
B-Mask
Version
Version
8 kbytes
H'FDF20
to
H'FFF1F
H'FFDF20
to
H'FFFF1F
H'FD20
to
H'FF1F
475