Table 2.9 System Control Instructions - Hitachi H8/3062 Hardware Manual

Single-chip microcomputer h8/3062 series; h8/3062b series; h8/3062f-ztat series; h8/3064f-ztat series
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Table 2.9
System Control Instructions
Instruction Size*
TRAPA
RTE
SLEEP
LDC
B/W
STC
B/W
ANDC
B
ORC
B
XORC
B
NOP
Note: * Size refers to the operand size.
B : Byte
W : Word
Function
Starts trap-instruction exception handling.
Returns from an exception-handling routine.
Causes a transition to the power-down state.
(EAs) → CCR
Moves the source operand contents to the condition code register. The
condition code register size is one byte, but in transfer from memory, data is
read by word access.
CCR → (EAd)
Transfers the CCR contents to a destination location. The condition code
register size is one byte, but in transfer to memory, data is written by word
access.
CCR ∧ #IMM → CCR
Logically ANDs the condition code register with immediate data.
CCR ∨ #IMM → CCR
Logically ORs the condition code register with immediate data.
CCR ⊕ #IMM → CCR
Logically exclusive-ORs the condition code register with immediate data.
PC + 2 → PC
Only increments the program counter.
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