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Port
Description
Port 8 • 5-bit I/O
P8
CS
port
• P8
to P8
P8
2
0
CS
have
Schmitt
inputs
P8
Port 9 • 6-bit I/O
P9
port
SCK
P9
SCK
P9
P9
P9
P9
Port A • 8-bit I/O
PA
port
TIOCB
• Schmitt
inputs
PA
TIOCA
PA
TIOCB
PA
TIOCA
PA
TIOCB
TCLKD
PA
TIOCA
TCLKC
PA
TCLKB
PA
TCLKA
Pins
Mode 1 Mode 2 Mode 3 Mode 4
IRQ
and IRQ
/IRQ
/
2
2
2
input
2
/IRQ
/
DDR = 0 (after reset): generic input
1
1
DDR = 1: CS
3
IRQ
/IRQ
input, and generic input/output
0
0
0
/IRQ
/
Input and output (SCK
5
5
communication interfaces 1 and 0 (SCI1/0), IRQ
1
generic input/output
/IRQ
/
4
4
0
/RxD
3
1
/RxD
2
0
/TxD
1
1
/TxD
0
0
/TP
/
Output (TP
) from
7
7
7
/A
pro-grammable
2
20
timing pattern
controller (TPC),
input or output
(TIOCB
) for 16-
2
bit timer and
generic input/
output
/TP
/
TPC output (TP
6
6
/A
to TP
), 16-bit
2
21
4
timer input and
/TP
/
5
5
output (TIOCA
/A
1
22
TIOCB
, TIOCA
1
/TP
/
4
4
and generic
/A
1
23
input/output
/TP
/
TPC output (TP
3
3
/
TCLKD, TCLKC, TCLKB, TCLKA), 8-bit timer input (TCLKD, TCLKC,
0
TCLKB, TCLKA), and generic input/output
/TP
/
2
2
/
0
/TP
/
1
1
/TP
/
0
0
Expanded Modes
input, CS
and CS
output, and generic
1
2
3
and CS
output
2
3
, SCK
, RxD
, RxD
1
0
1
Address output
(A
)
20
TPC output (TP
6
6
timer input and output (TIOCA
TIOCB
, TIOCA
), address output
1
1
,
(A
to A
), and generic input/
2
23
21
),
output
1
to TP
), 16-bit timer input and output (TIOCB
3
0
Single-Chip
Mode 5
Mode 6 Mode 7
IRQ
2
input and generic
input/output
, TxD
, TxD
) for serial
0
1
0
and IRQ
input, and 6-bit
5
4
Address output
TPC output (TP
(A
), TPC
16-bit timer input
20
output (TP
),
or output
7
input or output
(TIOCB
(TIOCB
) for
generic
2
16-bit timer,
input/output
and generic
input/output
to TP
),16-bit
TPC output (TP
4
,
to TP
2
timer input and
output (TIOCA
TIOCB
and generic
input/output
Modes
and IRQ
1
),
7
), and
2
6
), 16-bit
4
,
2
, TIOCA
)
1
1
, TIOCA
,
0
0
167
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