Hitachi H8/3062 Hardware Manual page 817

Mnemonic
W
DIVXU. W Rs, ERd
B
DIVXS. B Rs, Rd
W
DIVXS. W Rs, ERd
B
CMP.B #xx:8, Rd
B
CMP.B Rs, Rd
W
CMP.W #xx:16, Rd
W
CMP.W Rs, Rd
L
CMP.L #xx:32, ERd
L
CMP.L ERs, ERd
B
NEG.B Rd
W
NEG.W Rd
L
NEG.L ERd
W
EXTU.W Rd
L
EXTU.L ERd
W
EXTS.W Rd
L
EXTS.L ERd
Addressing Mode and
Instruction Length (bytes)
2
4
4
2
2
4
2
6
2
2
2
2
2
2
2
2
Operation I
ERd32 ÷ Rs16 → ERd32
— — (6) (7) — —
(Ed: remainder,
Rd: quotient)
(unsigned division)
Rd16 ÷ Rs8 → Rd16
— — (8) (7) — —
(RdH: remainder,
RdL: quotient)
(signed division)
ERd32 ÷ Rs16 → ERd32
— — (8) (7) — —
(Ed: remainder,
Rd: quotient)
(signed division)
Rd8–#xx:8 —
Rd8–Rs8 —
Rd16–#xx:16 — (1)
Rd16–Rs16 — (1)
ERd32–#xx:32 — (2)
ERd32–ERs32 — (2)
0–Rd8 → Rd8
—
0–Rd16 → Rd16
—
0–ERd32 → ERd32
—
0 → (<bits 15 to 8>
— — 0
of Rd16)
0 → (<bits 31 to 16>
— — 0
of ERd32)
(<bit 7> of Rd16) →
— —
(<bits 15 to 8> of Rd16)
(<bit 15> of ERd32) →
— —
(<bits 31 to 16> of
ERd32)
No. of
States*
Condition Code
H N Z V C
22
16
24
2
2
4
2
6
2
2
2
2
0 — 2
0 — 2
0 — 2
0 — 2
1
769