Interrupts After Reset; Figure 4.4 Reset Sequence (Mode 6) - Hitachi H8/3062 Hardware Manual

Single-chip microcomputer h8/3062 series; h8/3062b series; h8/3062f-ztat series; h8/3064f-ztat series
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φ
RES
Internal
address bus
Internal
read signal
Internal
write signal
High
Internal
data bus
(16 bits wide)
(1) : Address of reset exception handling vector (H'0000)
(2) : Start address (contents of reset exception handling vector address)
(3) : First instruction of program
4.2.3

Interrupts after Reset

If an interrupt is accepted after a reset but before the stack pointer (SP) is initialized, PC and CCR
will not be saved correctly, leading to a program crash. To prevent this, all interrupt requests,
including NMI, are disabled immediately after a reset exception handling. The first instruction of
the program is always executed immediately after the reset state ends. This instruction should
initialize the stack pointer (example: MOV.L #xx:32, SP).
Vector fetch
(1)
(2)

Figure 4.4 Reset Sequence (Mode 6)

Prefetch of
Internal
first program
processing
instruction
(2)
(3)
91

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