Contention between 16TCNT Write and Overflow or Underflow: If an overflow occurs in the
T
state of a 16TCNT write cycle, writing takes priority and the counter is not incremented. OVF
3
is set to 1. The same holds for underflow. See figure 8.41.
φ
Address bus
Internal write signal
16TCNT input clock
Overflow signal
16TCNT
OVF
Figure 8.41 Contention between 16TCNT Write and Overflow
276
16TCNT write cycle
T
T
1
2
16TCNT address
H'FFFF
16TCNT write data
T
3
M