Register Descriptions; Timer Start Register (Tstr) - Hitachi H8/3062 Hardware Manual

Address *
Channel
2 H'FFF78
H'FFF79
H'FFF7A
H'FFF7B
H'FFF7C
H'FFF7D
H'FFF7E
H'FFF7F
Notes: *1 The lower 20 bits of the address in advanced mode are indicated.
*2 Only 0 can be written in bits 3 to 0, to clear the flags.
8.2

Register Descriptions

8.2.1

Timer Start Register (TSTR)

TSTR is an 8-bit readable/writable register that starts and stops the timer counter (16TCNT) in
channels 0 to 2.
Bit 7
—
Initial value 1
Read/Write —
TSTR is initialized to H'F8 by a reset and in standby mode.
Bits 7 to 3—Reserved: These bits cannot be modified and are always read as 1.
Bit 2—Counter Start 2 (STR2): Starts and stops timer counter 2 (16TCNT2).
Bit 2
STR2 Description
0 16TCNT2 is halted
1 16TCNT2 is counting
228
1
Name
Timer control register 2
Timer I/O control register 2
Timer counter 2H
Timer counter 2L
General register A2H
General register A2L
General register B2H
General register B2L
6 5
— —
1 1
— —
Reserved bits
Abbre-
viation
16TCR2
TIOR2
16TCNT2H R/W
16TCNT2L R/W
GRA2H
GRA2L
GRB2H
GRB2L
4 3 2
— — STR2
1 1 0
— — R/W
Counter start 2 to 0
These bits start and
stop 16TCNT2 to 16TCNT0
Initial
R/W Value
R/W H'80
R/W H'88
H'00
H'00
R/W H'FF
R/W H'FF
R/W H'FF
R/W H'FF
1 0
STR1 STR0
0 0
R/W R/W
(Initial value)