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6.3.5
Address Output Method
The H8/3062F-ZTAT R-mask version, H8/3062F-ZTAT B-mask version, H8/3062 mask ROM
version, H8/3061 mask ROM version, H8/3060 mask ROM version, and H8/3064F-ZTAT B-
mask version, H8/3064 mask ROM B-mask version, H8/3062 mask ROM B-mask version,
H8/3061 mask ROM B-mask version, and H8/3060 mask ROM B-mask version provide a choice
of two address update methods: either the same method as in the previous H8/300H Series
(address update mode 1), or a method in which address updating is restricted to external space
accesses (address update mode 2).
Figure 6.5 shows examples of address output in these two update modes.
memory cycle
Address bus
(Address update
mode 1)
Address bus
(Address update
mode 2)
RD
Figure 6.5 Sample Address Output in Each Address Update Mode
Address Update Mode 1: Address update mode 1 is compatible with the previous H8/300H
Series. Addresses are always updated between bus cycles.
Address Update Mode 2: In address update mode 2, address updating is performed only in
external space accesses. In this mode, the address can be retained between an external space read
cycle and an instruction fetch cycle (on-chip memory) by placing the program in on-chip memory.
Address update mode 2 is therefore useful when connecting a device that requires address hold
time with respect to the rise of the RD strobe.
Switching between address update modes 1 and 2 is performed by means of the ADRCTL bit in
ADRCR. The initial value of ADRCR is the address update mode 1 setting, providing
compatibility with the previous H8/300H Series.
Cautions: The address output methods are designed so that the initial state with the bit selection
method is compatible with the H8/3062F-ZTAT (i.e. address update mode 1), and so there is
On-chip
External
read cycle
(Basic Bus Interface, 3-State Space)
On-chip
External
memory cycle
read cycle
On-chip
memory cycle
143
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