Register Settings; Table 13.3 Smart Card Interface Register Settings - Hitachi H8/3062 Hardware Manual

Single-chip microcomputer h8/3062 series; h8/3062b series; h8/3062f-ztat series; h8/3064f-ztat series

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Table of Contents

Register Settings

Table 13.3 shows a bit map of the registers used in the smart card interface. Bits indicated as 0 or

1 must be set to the value shown. The setting of other bits is described in this section.

Notes: —: Unused bit.

*1 Lower 20 bits of the address in advanced mode

*2 When GM is cleared to 0 in SMR, the CKE1 bit must also be cleared to 0.

Serial Mode Register (SMR) Settings: Clear the GM bit to 0 when using the normal smart card

interface mode, or set to 1 when using GSM mode. Clear the O/E bit to 0 if the smart card is of the

direct convention type, or set to 1 if of the inverse convention type.

Bits CKS1 and CKS0 select the clock source of the built-in baud rate generator. See section

13.3.5, Clock.

Bit Rate Register (BRR) Settings: BRR is used to set the bit rate. See section 13.3.5, Clock, for

the method of calculating the value to be set.

Serial Control Register (SCR) Settings: The TIE, RIE, TE, and RE bits have their normal serial

communication functions. See section 12, Serial Communication Interface, for details. The CKE1

and CKE0 bits specify clock output. To disable clock output, clear these bits to 00; to enable clock

output, set these bits to 01. Clock output is performed when the GM bit is set to 1 in SMR. Clock

output can also be fixed low or high.

Smart Card Mode Register (SCMR) Settings: Clear both the SDIR bit and SINV bit cleared to

0 if the smart card is of the direct convention type, and set both to 1 if of the inverse convention

type. To use the smart card interface, set the SMIF bit to 1.