Serial Mode Register (Smr) - Hitachi H8/3062 Hardware Manual

Single-chip microcomputer h8/3062 series; h8/3062b series; h8/3062f-ztat series; h8/3064f-ztat series
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12.2.5

Serial Mode Register (SMR)

SMR is an 8-bit register that specifies the SCI's serial communication format and selects the clock
source for the baud rate generator.
7
Bit
C/A
Initial value
0
Read/Write
R/W
The CPU can always read and write SMR. SMR is initialized to H'00 by a reset and in standby
mode.
Bit 7—Communication Mode (C/A)/GSM Mode (GM): The function of this bit differs for the
normal serial communication interface and for the smart card interface. Its function is switched
with the SMIF bit in SCMR.
For Serial Communication Interface (SMIF Bit in SCMR Cleared to 0): Selects whether the
SCI operates in asynchronous or synchronous mode.
368
6
5
CHR
PE
0
0
R/W
R/W
Parity enable
Selects whether a parity bit is added
Character length
Selects character length in asynchronous mode
Communication mode
Selects asynchronous or synchronous mode
4
3
2
O/E
STOP
MP
0
0
0
R/W
R/W
R/W
Stop bit length
Selects the stop bit length
Parity mode
Selects even or odd parity
1
0
CKS1
CKS0
0
0
R/W
R/W
Clock select 1/0
These bits select the
baud rate generator's
clock source
Multiprocessor mode
Selects the multiprocessor
function

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