Hitachi H8/3062 Hardware Manual page 481

Single-chip microcomputer h8/3062 series; h8/3062b series; h8/3062f-ztat series; h8/3064f-ztat series
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The register settings and examples of starting character waveforms are shown below for two smart
cards, one following the direct convention and one the inverse convention.
1. Direct Convention (SDIR = SINV = O/E = 0)
(Z)
A
Ds
With the direct convention type, the logic 1 level corresponds to state Z and the logic 0 level to
state A, and transfer is performed in LSB-first order. In the example above, the first character
data is H'3B. The parity bit is 1, following the even parity rule designated for smart cards.
2. Inverse Convention (SDIR = SINV = O/E = 1)
(Z)
A
Ds
With the inverse convention type, the logic 1 level corresponds to state A and the logic 0 level
to state Z, and transfer is performed in MSB-first order. In the example above, the first
character data is H'3F. The parity bit is 0, corresponding to state Z, following the even parity
rule designated for smart cards.
In the H8/3062 Series, inversion specified by the SINV bit applies only to the data bits, D7 to
D0. For parity bit inversion, the O/E bit in SMR must be set to odd parity mode. This applies
to both transmission and reception.
Z
Z
A
Z
D0
D1
D2
D3
Z
Z
A
A
D7
D6
D5
D4
Z
Z
A
A
D4
D5
D6
D7
A
A
A
A
D3
D2
D1
D0
Z
(Z)
State
Dp
Z
(Z)
State
Dp
433

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