Figure 17.7 Measurement Of Low Period Of Host's Transmit Data; Table 17.7 System Clock Frequencies For Which Automatic Adjustment Of Mcu Bit Rate Is Possible - Hitachi H8/3062 Hardware Manual

Single-chip microcomputer h8/3062 series; h8/3062b series; h8/3062f-ztat series; h8/3064f-ztat series
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Automatic SCI Bit Rate Adjustment:
Start
bit

Figure 17.7 Measurement of Low Period of Host's Transmit Data

When boot mode is initiated, the MCU measures the low period of the asynchronous SCI
communication data (H'00) transmitted continuously from the host (figure 17.7). The SCI
transmit/receive format should be set as 8-bit data, 1 stop bit, no parity. The MCU calculates the
bit rate of the transmission from the host from the measured low period, and transmits one H'00
byte to the host to indicate the end of bit rate adjustment. The host should confirm that this
adjustment end indication (H'00) has been received normally, and transmit one H'55 byte to the
MCU. If reception cannot be performed normally, initiate boot mode again (reset), and repeat the
above operations. Depending on the host's transmission bit rate and the MCU's system clock
frequency, there will be a discrepancy between the bit rates of the host and the MCU. To ensure
correct SCI operation, the host's transfer bit rate should be set to 4800 or 9600 bps *
Table 17.7 shows typical host transfer bit rates and system clock frequencies for which automatic
adjustment of the MCU bit rate is possible. The boot program should be executed within this
2
system clock range *
Table 17.7 System Clock Frequencies for which Automatic Adjustment of MCU Bit Rate is
Possible
Host Bit Rate (bps)
9600
4800
Notes: *1 Use a host bit rate setting of 4800, or 9600 bps only. No other setting should be used.
*2 Although the MCU may also perform automatic bit rate adjustment with bit rate and
system clock combinations other than those shown in table 17.7, a degree of error will
arise between the bit rates of the host and the MCU, and subsequent transfer will not be
performed normally. Therefore, only a combination of bit rate and system clock
frequency within one of the ranges shown in table 17.7 can be used for boot mode
execution.
D0
D1
D2
Low period (9 bits) measured (H'00 data)
.
System Clock Frequency for which Automatic Adjustment
of MCU Bit Rate is Possible (MHz)
8 to 20
4 to 20
D3
D4
D5
Stop
D6
D7
bit
High period
(1 or more bits)
1
.
495

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