Pin Configuration; Register Configuration; Table 17.2 Flash Memory Pins; Table 17.3 Flash Memory Registers - Hitachi H8/3062 Hardware Manual

17.2.3

Pin Configuration

The flash memory is controlled by means of the pins shown in table 17.2.

Table 17.2 Flash Memory Pins

Pin Name
Reset
Flash write enable
Mode 2
Mode 1
Mode 0
Transmit data
Receive data
Note: The transmit data pin and receive data pin are used in boot mode.
* In the versions with on-chip mask ROM, the FWE pin functions as the RESO pin.
17.2.4

Register Configuration

The registers used to control the on-chip flash memory when enabled are shown in table 17.3.

Table 17.3 Flash Memory Registers

Register Name
Flash memory control register
Erase block register
RAM control register
Flash memory status register
Notes: FLMCR, EBR, RAMCR, and FLMSR are 8-bit registers, and should be accessed by byte
access. These registers are used only in the versions with on-chip flash memory. Reading
the corresponding addresses in a version with on-chip mask ROM will always return 1s,
and writes to these addresses are disabled.
*1 Lower 20 bits of address in advanced mode
*2 When a high level is input to the FWE pin, the initial value is H'80.
482
Abbreviation I/O
RES
Input
FWE *
Input
MD Input
2
MD Input
1
MD Input
0
TxD Output
1
RxD Input
1
Abbreviation
FLMCR
EBR
RAMCR
FLMSR
Function
Reset
Flash program/erase protection by hardware
Sets operating mode of H8/3062F-ZTAT or
H8/3062F-ZTAT R-mask version
Sets operating mode of H8/3062F-ZTAT or
H8/3062F-ZTAT R-mask version
Sets operating mode of H8/3062F-ZTAT or
H8/3062F-ZTAT R-mask version
Serial transmit data output
Serial receive data input
R/W Initial Value
2
H'00 *
R/W
R/W H'00
R/W H'F1
R H'7F
1
Address *
H'EE030
H'EE032
H'EE077
H'EE07D