Hitachi H8/3062 Hardware Manual page 433

The BRR setting is calculated as follows:
Asynchronous mode:
N =
64 × 2
2n–1
Synchronous mode:
φ
N =
8 × 2
2n–1
B: Bit rate (bit/s)
N: BRR setting for baud rate generator (0 ≤ N ≤ 255)
φ: System clock frequency (MHz)
n: Baud rate generator input clock (n = 0, 1, 2, 3)
(For the clock sources and values of n, see the following table.)
n
0
1
2
3
The bit rate error in asynchronous mode is calculated as follows:
Error (%) =
φ
× 10
6
– 1
× B
× 10
6
– 1
× B
Clock Source
φ
φ/4
φ/16
φ/64
φ × 10
6
(N + 1) × B × 64 × 2
CKS1
0
0
1
1
– 1 × 100
2n–1
SMR Settings
CKS0
0
1
0
1
385