Hitachi H8/3062 Hardware Manual page 118

Bit 7—Software Standby (SSBY): Enables transition to software standby mode. (For further
information about software standby mode see section 21, Power-Down State.)
When software standby mode is exited by an external interrupt, and a transition is made to normal
operation, this bit remains set to 1. To clear this bit, write 0.
Bit 7
SSBY Description
0 SLEEP instruction causes transition to sleep mode
1 SLEEP instruction causes transition to software standby mode
Bits 6 to 4—Standby Timer Select 2 to 0 (STS2 to STS0): These bits select the length of time
the CPU and on-chip supporting modules wait for the internal clock oscillator to settle when
software standby mode is exited by an external interrupt.
When using a crystal oscillator, set these bits so that the waiting time will be at least 7 ms at the
system clock rate. When operating on an external clock, care is required in the case of the
H8/3064F-ZTAT B-mask version, H8/3062F-ZTAT B-mask version, H8/3064 mask ROM B-
mask version, H8/3062 mask ROM B-mask version, H8/3061 mask ROM B-mask version, and
H8/3060 mask ROM B-mask version.
For further information about waiting time selection, see section 21.4.3, Selection of Waiting
Time for Exit from Software Standby Mode.
Bit 6 Bit 5
STS2 STS1
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
70
Bit 4
STS0 Description
0 Waiting time = 8,192 states
1 Waiting time = 16,384 states
0 Waiting time = 32,768 states
1 Waiting time = 65,536 states
0 Waiting time = 131,072 states
1 Waiting time = 262,144 states
0 Waiting time = 1,024 states
1 Illegal setting
(Initial value)
(Initial value)