φ
V
CC
FWE
*1
MD
to MD
2
0
RES
SWE bit
Period during which flash memory access is prohibited
(x: Wait time after setting SWE bit, y: Wait time after clearing SWE bit)
Period during which flash memory can be programmed
(Execution of program in flash memory prohibited, and data reads other than verify operations
prohibited)
Notes: *1 Except when switching modes, the level of the mode pins (MD
by pulling the pins up or down.
*2 See 22.3.6 Flash Memory Characteristics.
Figure 18.17 Power-On/Off Timing (User Program Mode)
570
Wait time:
x
t
OSC1
t
MDS
SWE set
Program-
ming/
erasing
Wait time:
possible
y
SWE cleared
*2
to MD
2
Min 0 µs
) must be fixed until power-off
0